In Dual Port Static Random Access Memory (DPSRAM) the static noise margin (SNM) changes between two different access modes, is degraded and generally at the worst case in common access mode. In two-port register files (2PRF) or multi-port register files, when simultaneous read/write access occurs at the same row, misreading can occur due to large current leakage. Prior art approaches that solve the above deficiencies require complex timing, circuit designs and/or area compromise (e.g. areas to implement such complex circuits, to provide circuits for speed and/or margin trade-off, etc.).